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Special Metal Base PCB
COB Mirror MCPCB

COB Mirror MCPCB

Quick Details

Product Description

Quick Details

Number of Layers:

1-Layer

Base Material:

Aluminum

Copper Thickness:

0.5oz

Board Thickness:

0.2-5mm

Min. Hole Size:

0.6mm

Min. Line Width:

8mil

Min. Line Spacing:

8mil

Surface Finishing:

LF-HASL

Minimum Order Quantity:

NO MOQ

 

Soldermask

White

Quantity

IPC2

Quick-turn service with prototype

24 hours

 

Logistics

Fedex

Certificate

ISO, Rohs

 

 

Inno Circuit, one of the professional and credible manufacturers and suppliers of PCB, now brings you the best quality COB mirror mcpcb at low price. Introducing advanced equipment and employing qualified workers, we have been continuing to innovate. Now, please feel free to check the quotation with us and get the free sample from us.


FAQ

1. For an all-digital signal PCB, there is an 80MHz clock source on the board. In addition to using wire mesh (ground), what kind of circuit should be used for protection in order to ensure sufficient drive capability?

To ensure that the clock's drive capability should not be achieved through protection, clock-driven chips are generally used. The general concern about clock drive capability is due to multiple clock loads. A clock-driven chip is used to convert one clock signal into several, using a point-to-point connection. Select the driver chip, in addition to ensure that the basic match with the load, the signal edge to meet the requirements (usually the clock is along the effective signal), in calculating the system timing, we must count the clock in the drive chip delay.

2, if you use a separate clock signal board, what kind of interface is generally used to ensure that the transmission of the clock signal is affected little?

The shorter the clock signal, the smaller the transmission line effect. Using a separate clock signal board increases the signal wiring length. Moreover, the grounding power supply of the board is also a problem. If you want to transmit over long distances, it is recommended to use differential signals. The LVDS signal can meet the driving ability requirements, but your clock is not too fast, not necessary.

3, 27M, SDRAM clock line (80M-90M), these 3rd and 3rd harmonics of the clock line are just in the VHF band, and the interference is very large after receiving the high frequency from the receiving end. In addition to shortening the length of the line, what are some good ways to do this?

If the third harmonic is large and the second harmonic is small, it may be because the signal duty ratio is 50% because in this case, the signal has no even harmonics. Then need to modify the signal duty cycle.

In addition, for a one-way clock signal, source-side serial matching is generally used. This suppresses secondary reflection but does not affect the clock edge rate. The source matching value can be obtained using the following formula.


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